Coverart for item
The Resource Models, methods, and tools for complex chip design : selected contributions from FDL 2012, Jan Hasse, editor, (electronic resource)

Models, methods, and tools for complex chip design : selected contributions from FDL 2012, Jan Hasse, editor, (electronic resource)

Label
Models, methods, and tools for complex chip design : selected contributions from FDL 2012
Title
Models, methods, and tools for complex chip design
Title remainder
selected contributions from FDL 2012
Statement of responsibility
Jan Hasse, editor
Contributor
Subject
Genre
Language
eng
Summary
This book brings together a selection of the best papers from the fifteenth edition of the Forum on specification and Design Languages Conference (FDL), which was held in September 2012 at Vienna University of Technology, Vienna, Austria. FDL is a well-established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modeling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems. · Covers Assertion Based Design, Verification & Debug; · Includes language-based modeling and design techniques for embedded systems; · Covers design, modeling and verification of mixed physical domain and mixed signal systems that include significant analog parts in electrical and non-electrical domains; · Includes formal and semi-formal system level design methods for complex embedded systems based on the Unified Modelling Language (UML) and Model Driven Engineering (MDE)
Cataloging source
CaPaEBR
LC call number
TK7895.E42
LC item number
M64 2012eb
http://library.link/vocab/relatedWorkOrContributorName
Hasse, Jan
Series statement
Lectures in electrical engineering,
Series volume
v. 265
http://library.link/vocab/subjectName
  • Embedded computer systems
  • Systems on a chip
Label
Models, methods, and tools for complex chip design : selected contributions from FDL 2012, Jan Hasse, editor, (electronic resource)
Instantiates
Publication
Note
"Selected papers presented at the Forum on Specification and Design Languages (FDL) 2012, at Vienna University of Technology, Vienna, Austria
Bibliography note
Includes bibliographical references
Contents
Formal Plausibility Checks for Environment -- Efficient Refinement Strategy Exploiting Component Properties in A CEGAR Process -- Formal Specification Level -- Power Estimation Methodology for SystemC -- SystemC Analysis for Nondeterminism Anomalies -- A Design and Verification Methodology for Mixed-Signal Systems Using SystemC-AMS -- Configurable Load Emulation Using FPGA and Power Amplifiers for Automotive Power ICs -- Model Based Design of Distributed Embedded Cyber Physical Systems -- Model-driven Methodology for the Development of Multi-level Executable Environments -- The Concept and Study of Grid Responsiveness -- Polynomial Metamodel-Based Fast Optimization of Nanoscale PLL Components -- Methodology and Example-Driven Interconnect Synthesis for Designing Heterogenous Coarse-Grain Reconfigurable Architectures
Control code
OCM1bookssj0001008706
Dimensions
unknown
Isbn
9783319014173
Note
  • Electronic reproduction. Palo Alto, Calif. : ebrary, 2013. Available via World Wide Web. Access may be limited to ebrary affiliated libraries.
  • Electronic reproduction. Palo Alto, Calif. : ebrary, 2013. Available via World Wide Web. Access may be limited to ebrary affiliated libraries.
  • Electronic reproduction. Palo Alto, Calif. : ebrary, 2013. Available via World Wide Web. Access may be limited to ebrary affiliated libraries.
Specific material designation
remote
System control number
(WaSeSS)bookssj0001008706
Label
Models, methods, and tools for complex chip design : selected contributions from FDL 2012, Jan Hasse, editor, (electronic resource)
Publication
Note
"Selected papers presented at the Forum on Specification and Design Languages (FDL) 2012, at Vienna University of Technology, Vienna, Austria
Bibliography note
Includes bibliographical references
Contents
Formal Plausibility Checks for Environment -- Efficient Refinement Strategy Exploiting Component Properties in A CEGAR Process -- Formal Specification Level -- Power Estimation Methodology for SystemC -- SystemC Analysis for Nondeterminism Anomalies -- A Design and Verification Methodology for Mixed-Signal Systems Using SystemC-AMS -- Configurable Load Emulation Using FPGA and Power Amplifiers for Automotive Power ICs -- Model Based Design of Distributed Embedded Cyber Physical Systems -- Model-driven Methodology for the Development of Multi-level Executable Environments -- The Concept and Study of Grid Responsiveness -- Polynomial Metamodel-Based Fast Optimization of Nanoscale PLL Components -- Methodology and Example-Driven Interconnect Synthesis for Designing Heterogenous Coarse-Grain Reconfigurable Architectures
Control code
OCM1bookssj0001008706
Dimensions
unknown
Isbn
9783319014173
Note
  • Electronic reproduction. Palo Alto, Calif. : ebrary, 2013. Available via World Wide Web. Access may be limited to ebrary affiliated libraries.
  • Electronic reproduction. Palo Alto, Calif. : ebrary, 2013. Available via World Wide Web. Access may be limited to ebrary affiliated libraries.
  • Electronic reproduction. Palo Alto, Calif. : ebrary, 2013. Available via World Wide Web. Access may be limited to ebrary affiliated libraries.
Specific material designation
remote
System control number
(WaSeSS)bookssj0001008706

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