Coverart for item
The Resource Proceedings : 1999 International Conference on Parallel Architectures and Compilation Techniques : October 12-16, 1999, Newport Beach, California, sponsored by IFIP and IEEE Computer Society

Proceedings : 1999 International Conference on Parallel Architectures and Compilation Techniques : October 12-16, 1999, Newport Beach, California, sponsored by IFIP and IEEE Computer Society

Label
Proceedings : 1999 International Conference on Parallel Architectures and Compilation Techniques : October 12-16, 1999, Newport Beach, California
Title
Proceedings
Title remainder
1999 International Conference on Parallel Architectures and Compilation Techniques : October 12-16, 1999, Newport Beach, California
Statement of responsibility
sponsored by IFIP and IEEE Computer Society
Title variation
  • PACT '99
  • 1999 International Conference on Parallel Architectures and Compilation Techniques
  • Parallel Architectures and Compilation Techniques, 1999, Proceedings, 1999 International Conference on
Creator
Contributor
Subject
Genre
Language
eng
Member of
Cataloging source
OCL
Dewey number
004/.35
Illustrations
illustrations
Index
index present
Language note
English
LC call number
QA76.58
LC item number
.I5445 1999
Literary form
non fiction
http://bibfra.me/vocab/lite/meetingDate
1999
http://bibfra.me/vocab/lite/meetingName
International Conference on Parallel Architectures and Compilation Techniques
Nature of contents
  • dictionaries
  • bibliography
http://library.link/vocab/relatedWorkOrContributorName
  • IEEE Computer Society
  • IFIP Working Group 10.3 on Software/Hardware Interrelation
  • International Federation for Information Processing
http://library.link/vocab/subjectName
  • Parallel computers
  • Computer architecture
  • Parallel processing (Electronic computers)
  • Compiling (Electronic computers)
  • Compilers (Computer programs)
  • Compilers (Computer programs)
  • Compiling (Electronic computers)
  • Computer architecture
  • Parallel computers
  • Parallel processing (Electronic computers)
Label
Proceedings : 1999 International Conference on Parallel Architectures and Compilation Techniques : October 12-16, 1999, Newport Beach, California, sponsored by IFIP and IEEE Computer Society
Instantiates
Publication
Note
  • "IEEE Computer Society order number PR00425"--Title page verso
  • "IEEE order plan catalog number PR00425"--Title page verso
Bibliography note
Includes bibliographical references and index
Carrier category
online resource
Carrier category code
  • cr
Carrier MARC source
rdacarrier
Content category
text
Content type code
  • txt
Content type MARC source
rdacontent
Contents
  • A Multithreaded Java Microcontroller for Thread-Oriented Real-Time Event Handling
  • U. Brinkschulte, C. Krakowski and J. Kreuzinger
  • [and others]
  • On Dynamic Speculative Thread Partitioning and the MEM-Slicing Algorithm
  • L. Codrescu and D. Wills
  • Branch Prediction Using Selective Branch Inversion
  • S. Manne, A. Klauser and D. Grunwald
  • Control-Flow Speculation through Value Prediction for Superscalar Processors
  • J. Gonzalez and A. Gonzalez
  • Exploring Last n Value Prediction
  • Exploring Instruction-Fetch Bandwidth Requirements in Wide-Issue Superscalar Processors
  • M. Burtscher and B. Zorn
  • Evaluating Register Allocation and Instruction Scheduling Techniques in Out-Of-Order Issue Processors
  • M. Valluri and R. Govindarajan
  • Containers on the Parallelization of General-Purpose Java Programs
  • P. Wu and D. Padua
  • The Modulo Interval: A Simple and Practical Representation for Program Analysis
  • T. Nakanishi, K. Joe and C. Polychronopoulos
  • [and others]
  • Memory System Support for Image Processing
  • L. Zhang, B. Carter and W. Hsieh
  • P. Michaud, A. Seznec and S. Jourdan
  • [and others]
  • Performance Characteristics of a Network of Commodity Multiprocessors for the NAS Benchmarks Using a Hybrid Memory Model
  • F. Capello and O. Richard
  • Quantifying the Benefits of SPECint Distant Parallelism in Simultaneous Multi-Threading Architectures
  • D. Ortega, I. Martel and V. Krishnan
  • [and others]
  • High-End Computing Technology: Where is it Heading?
  • Greg Astfalk
  • LaTTe: A Java VM Just-In-Time Compiler with Fast and Efficient Register Allocation
  • B.-S. Yang, S.-M. Moon and S. Park
  • MPEG-2 Video Decompression on Simultaneous Multithreaded Multimedia Processors
  • [and others]
  • Automatic Parallelization of Recursive Procedures
  • M. Gupta, S. Mukhopadhyay and N. Sinha
  • On the Complexity of Loop Fusion
  • A. Darte
  • A Cost-Effective Clustered Architecture
  • R. Canal, J.-M. Parcerisa and A. Gonzalez
  • Optimizing Data Locality for SCI-Based PC-Clusters with the SMiLE Monitoring Approach
  • W. Karl, M. Leberecht and M. Schultz
  • Dynamic Linking on a Shared-Memory Multiprocessor
  • H. Oehring, U. Sigmund and T. Ungerer
  • B. Alpern, M. Charney and J.-D. Choi
  • [and others]
  • Reducing Cache Conflicts by Partitioning and Privatizing Shared Arrays
  • Z. Li
  • Localizing Non-Affine Array References
  • N. Mitcheli, L. Carter and J. Ferrante
  • On Reducing False Sharing while Improving Locality on Shared Memory Multiprocessors
  • M. Kandemir, A. Choudhary and J. Ramanujam
  • [and others]
  • Lower Bounding Techniques for the Multiprocessor Scheduling Problem with Communication Delay
  • A Fully Asynchronous Superscalar Architecture
  • S. Fujita and T. Nakagawa
  • Automatic Analytical Modeling for the Estimation of Cache Misses
  • B. Fraguela, R. Doallo and E. Zapata
  • Linux Alighted: Down to Earth Clusters
  • Beau Vrolyk
  • Cameron: High level Language Compilation for Reconfigurable Systems
  • J. Hammes, B. Rinker and W. Bohm
  • [and others]
  • Predicated Static Single Assignment
  • L. Carter, B. Simon and B. Calder
  • D. Arvind and R. Mullins
  • [and others]
  • The Effect of Program Optimization on Trace Cache Efficiency
  • D. Howard and M. Lipasti
  • Data Dependence Testing in Practice
  • K. Psarris and K. Kyriakopoulos
  • On Index Set Splitting
  • M. Griebl, P. Feautrier and C. Lenguaer
  • Efficient Parallelization Using Combined Loop and Data Transformations
  • M. O'boyle and P. Knijnenburg
  • Caching and Predicting Branch Sequences for Improved Fetch Effectiveness
  • The Need for Fast Communication in Hardware-Based Speculative Chip Multiprocessors
  • S. Onder, J. Xu and R. Gupta
  • In Search of Speculative Thread-Level Parallelism
  • J. Oplinger, D. Heine and M. Lam
  • Looking at History to Filter Allocations in Prediction Tables
  • E. Morancho, J. Maria Llaberia and A. Olive
  • V. Krishnan and J. Torellas
Control code
47881441
Dimensions
unknown
Extent
1 online resource (xv, 321 pages)
Form of item
online
Isbn
9780769504254
Media category
computer
Media MARC source
rdamedia
Media type code
  • c
Other physical details
illustrations
Sound
unknown sound
Specific material designation
remote
System control number
(OCoLC)47881441
Label
Proceedings : 1999 International Conference on Parallel Architectures and Compilation Techniques : October 12-16, 1999, Newport Beach, California, sponsored by IFIP and IEEE Computer Society
Publication
Note
  • "IEEE Computer Society order number PR00425"--Title page verso
  • "IEEE order plan catalog number PR00425"--Title page verso
Bibliography note
Includes bibliographical references and index
Carrier category
online resource
Carrier category code
  • cr
Carrier MARC source
rdacarrier
Content category
text
Content type code
  • txt
Content type MARC source
rdacontent
Contents
  • A Multithreaded Java Microcontroller for Thread-Oriented Real-Time Event Handling
  • U. Brinkschulte, C. Krakowski and J. Kreuzinger
  • [and others]
  • On Dynamic Speculative Thread Partitioning and the MEM-Slicing Algorithm
  • L. Codrescu and D. Wills
  • Branch Prediction Using Selective Branch Inversion
  • S. Manne, A. Klauser and D. Grunwald
  • Control-Flow Speculation through Value Prediction for Superscalar Processors
  • J. Gonzalez and A. Gonzalez
  • Exploring Last n Value Prediction
  • Exploring Instruction-Fetch Bandwidth Requirements in Wide-Issue Superscalar Processors
  • M. Burtscher and B. Zorn
  • Evaluating Register Allocation and Instruction Scheduling Techniques in Out-Of-Order Issue Processors
  • M. Valluri and R. Govindarajan
  • Containers on the Parallelization of General-Purpose Java Programs
  • P. Wu and D. Padua
  • The Modulo Interval: A Simple and Practical Representation for Program Analysis
  • T. Nakanishi, K. Joe and C. Polychronopoulos
  • [and others]
  • Memory System Support for Image Processing
  • L. Zhang, B. Carter and W. Hsieh
  • P. Michaud, A. Seznec and S. Jourdan
  • [and others]
  • Performance Characteristics of a Network of Commodity Multiprocessors for the NAS Benchmarks Using a Hybrid Memory Model
  • F. Capello and O. Richard
  • Quantifying the Benefits of SPECint Distant Parallelism in Simultaneous Multi-Threading Architectures
  • D. Ortega, I. Martel and V. Krishnan
  • [and others]
  • High-End Computing Technology: Where is it Heading?
  • Greg Astfalk
  • LaTTe: A Java VM Just-In-Time Compiler with Fast and Efficient Register Allocation
  • B.-S. Yang, S.-M. Moon and S. Park
  • MPEG-2 Video Decompression on Simultaneous Multithreaded Multimedia Processors
  • [and others]
  • Automatic Parallelization of Recursive Procedures
  • M. Gupta, S. Mukhopadhyay and N. Sinha
  • On the Complexity of Loop Fusion
  • A. Darte
  • A Cost-Effective Clustered Architecture
  • R. Canal, J.-M. Parcerisa and A. Gonzalez
  • Optimizing Data Locality for SCI-Based PC-Clusters with the SMiLE Monitoring Approach
  • W. Karl, M. Leberecht and M. Schultz
  • Dynamic Linking on a Shared-Memory Multiprocessor
  • H. Oehring, U. Sigmund and T. Ungerer
  • B. Alpern, M. Charney and J.-D. Choi
  • [and others]
  • Reducing Cache Conflicts by Partitioning and Privatizing Shared Arrays
  • Z. Li
  • Localizing Non-Affine Array References
  • N. Mitcheli, L. Carter and J. Ferrante
  • On Reducing False Sharing while Improving Locality on Shared Memory Multiprocessors
  • M. Kandemir, A. Choudhary and J. Ramanujam
  • [and others]
  • Lower Bounding Techniques for the Multiprocessor Scheduling Problem with Communication Delay
  • A Fully Asynchronous Superscalar Architecture
  • S. Fujita and T. Nakagawa
  • Automatic Analytical Modeling for the Estimation of Cache Misses
  • B. Fraguela, R. Doallo and E. Zapata
  • Linux Alighted: Down to Earth Clusters
  • Beau Vrolyk
  • Cameron: High level Language Compilation for Reconfigurable Systems
  • J. Hammes, B. Rinker and W. Bohm
  • [and others]
  • Predicated Static Single Assignment
  • L. Carter, B. Simon and B. Calder
  • D. Arvind and R. Mullins
  • [and others]
  • The Effect of Program Optimization on Trace Cache Efficiency
  • D. Howard and M. Lipasti
  • Data Dependence Testing in Practice
  • K. Psarris and K. Kyriakopoulos
  • On Index Set Splitting
  • M. Griebl, P. Feautrier and C. Lenguaer
  • Efficient Parallelization Using Combined Loop and Data Transformations
  • M. O'boyle and P. Knijnenburg
  • Caching and Predicting Branch Sequences for Improved Fetch Effectiveness
  • The Need for Fast Communication in Hardware-Based Speculative Chip Multiprocessors
  • S. Onder, J. Xu and R. Gupta
  • In Search of Speculative Thread-Level Parallelism
  • J. Oplinger, D. Heine and M. Lam
  • Looking at History to Filter Allocations in Prediction Tables
  • E. Morancho, J. Maria Llaberia and A. Olive
  • V. Krishnan and J. Torellas
Control code
47881441
Dimensions
unknown
Extent
1 online resource (xv, 321 pages)
Form of item
online
Isbn
9780769504254
Media category
computer
Media MARC source
rdamedia
Media type code
  • c
Other physical details
illustrations
Sound
unknown sound
Specific material designation
remote
System control number
(OCoLC)47881441

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